NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1250 / 1379

48.1.3.3.29 TRNG0 Statistical Check Poker Count 1 and 0 (TRNG0_PK
RCNT10)
48.1.3.3.29.1 Address
Register Offset
TRNG0_PKRCNT10 400A5080h
48.1.3.3.29.2 Function
The TRNG0 Statistical Check Poker Count 1 and 0 Register is a read-only register used
to read the final Poker test counts of 1h and 0h patterns. The Poker 0h Count increments
each time a nibble of sample data is found to be 0h. The Poker 1h Count increments each
time a nibble of sample data is found to be 1h. Note that this register is readable only if
TRNG0_MCTL[PRGM] is 0, otherwise zeroes will be read.
48.1.3.3.29.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R PKR_1_CT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R PKR_0_CT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
48.1.3.3.29.4 Fields
Field Function
31-16
PKR_1_CT
Poker 1h Count. Total number of nibbles of sample data which were found to be 1h. Requires
TRNG0_MCTL[PRGM] = 0.
15-0
PKR_0_CT
Poker 0h Count. Total number of nibbles of sample data which were found to be 0h. Requires
TRNG0_MCTL[PRGM] = 0.
Standalone True Random Number Generator (SA-TRNG).
K32 L2A Reference Manual, Rev. 2, 01/2020
1250 NXP Semiconductors