NXP Semiconductors K32 L2A Series, Reference Manual, Page: 224 / 1379

11.6.2.3 Noise-induced errors
System noise that occurs during the sample or conversion process can affect the accuracy
of the conversion. The ADC accuracy numbers are guaranteed as specified only if the
following conditions are met:
• There is a 0.1 μF low-ESR capacitor from V
REFH
to V
REFL
.
• There is a 0.1 μF low-ESR capacitor from V
DDA
to V
SSA
.
• If inductive isolation is used from the primary supply, an additional 1 μF capacitor is
placed from V
DDA
to V
SSA
.
• V
SSA
, and V
REFL
, if connected, is connected to V
SS
at a quiet point in the ground
plane.
• Operate the MCU in Wait or Normal Stop mode before initiating (hardware-triggered
conversions) or immediately after initiating (hardware- or software-triggered
conversions) the ADC conversion.
• For software triggered conversions, immediately follow the write to SC1 with a
Wait instruction or Stop instruction.
• For Normal Stop mode operation, select ADACK as the clock source. Operation
in Normal Stop reduces V
DD
noise but increases effective conversion time due to
stop recovery.
• There is no I/O switching, input or output, on the MCU during the conversion.
There are some situations where external system activity causes radiated or conducted
noise emissions or excessive V
DD
noise is coupled into the ADC. In these situations, or
when the MCU cannot be placed in Wait or Normal Stop mode, or I/O activity cannot be
halted, the following actions may reduce the effect of noise on the accuracy:
• Place a 0.01 μF capacitor (C
AS
) on the selected input channel to V
REFL
or V
SSA
. This
improves noise issues, but affects the sample rate based on the external analog source
resistance.
• Average the result by converting the analog input many times in succession and
dividing the sum of the results. Four samples are required to eliminate the effect of a
1 LSB, one-time error.
• Reduce the effect of synchronous noise by operating off the asynchronous clock, that
is, ADACK, and averaging. Noise that is synchronous to ADCK cannot be averaged
out.
Application information
K32 L2A Reference Manual, Rev. 2, 01/2020
224 NXP Semiconductors