NXP Semiconductors K32 L2A Series, Reference Manual, Page: 889 / 1379

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
OCMT
OCMPU
Reserved
W
Reset x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
The reset values are different for the individual OCMDR registers. OCMDR0: 0xD904_0000; OCMDR1: 0xC704_0000;
OCMDR2: 0xC704_6000x = Undefined at reset. •
MSCM_OCMDRn field descriptions
Field Description
31
V
OCMEM Valid bit. This read-only field defines the validity (presence) of the on-chip memory
0 OCMEMn is not present.
1 OCMEMn is present.
30
Reserved
This field is reserved.
This Reserved field always has the value of 1.
29
Reserved
This field is reserved.
28
OCMSZH
OCMEM Size “Hole”. For on-chip memories that are not fully populated, that is, include a memory “hole” in
the upper 25% of the address range, this bit is used.
0 OCMEMn is a power-of-2 capacity.
1 OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ.
Table continues on the next page...
Chapter 34 Miscellaneous System Control Module (MSCM)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 889