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Wait
for response
Yes
Yes
Wait for payload
length part from
target (2 bytes)
Wait for CRC
checksum from
Payload length
less than supported
length?
Yes
Wait for payload
data from target
No
Set payload length
to maximum
supported length
No
No
Reached
maximum
Report a timeout
error (End)
Yes
End
No
0x5A
received?
0xA4
received?
Wait for 1 byte
from target
Wait for 1 byte
from target
retries?
target (2 bytes)
Figure 14-29. Host reads a command response from target via LPUART
14.4.5 USB peripheral
The Kinetis Bootloader in the ROM supports loading data into flash via the USB
peripheral. The target is implemented as a USB HID class.
USB HID does not use framing packets; instead the packetization inherent in the USB
protocol itself is used. The ability for the device to NAK Out transfers (until they can be
received) provides the required flow control; the built-in CRC of each USB packet
provides the required error detection.
14.4.5.1 Clock configuration
The ROM supports the crystal-less USB feature. If the USB peripheral is enabled, then
the ROM enables the 48-MHz . The ROM also enables the USB clock recovery feature
(by setting USBx_CLK_RECOVER_CTRL[CLOCK_RECOVER_EN] to 1 ).
14.4.5.2 Device descriptor
The Kinetis ROM configures the default USB VID/PID/Strings as below:
Default VID/PID:
Chapter 14 Kinetis ROM Bootloader
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
309
Summary of Contents for K32 L2A Series
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Page 122: ...Flash Memory Clock K32 L2A Reference Manual Rev 2 01 2020 122 NXP Semiconductors...
Page 158: ...Debug and security K32 L2A Reference Manual Rev 2 01 2020 158 NXP Semiconductors...
Page 174: ...Module Signal Description Tables K32 L2A Reference Manual Rev 2 01 2020 174 NXP Semiconductors...
Page 246: ...Application information K32 L2A Reference Manual Rev 2 01 2020 246 NXP Semiconductors...
Page 374: ...CMP Trigger Mode K32 L2A Reference Manual Rev 2 01 2020 374 NXP Semiconductors...
Page 384: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 384 NXP Semiconductors...
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