NXP Semiconductors K32 L2A Series, Reference Manual, Page: 704 / 1379

LPI2Cx_MSR field descriptions (continued)
Field Description
Indicates that the received data has matched the MATCH0 and/or MATCH1 fields as configured by
MATCFG. Received data that is discarded due to CMD field does not cause this flag to set.
0 Have not received matching data.
1 Have received matching data.
13
PLTF
Pin Low Timeout Flag
Will set when the SCL and/or SDA input is low for more than PINLOW cycles, even when the LPI2C
master is idle. Software is responsible for resolving the pin low condition. This flag cannot be cleared for
as long as the pin low timeout continues and must be cleared before the LPI2C can initiate a START
condition.
0 Pin low timeout has not occurred or is disabled.
1 Pin low timeout has occurred.
12
FEF
FIFO Error Flag
Detects an attempt to send or receive data without first generating a (repeated) START condition. This can
occur if the transmit FIFO underflows when the AUTOSTOP bit is set. When this flag is set, the LPI2C
master will send a STOP condition (if busy) and will not initiate a new START condition until this flag has
been cleared.
0 No error.
1 Master sending or receiving data without START condition.
11
ALF
Arbitration Lost Flag
This flag will set if the LPI2C master transmits a logic one and detects a logic zero on the I2C bus, or if it
detects a START or STOP condition while it is transmitting data. When this flag sets, the LPI2C master will
release the bus (go idle) and will not initiate a new START condition until this flag has been cleared.
0 Master has not lost arbitration.
1 Master has lost arbitration.
10
NDF
NACK Detect Flag
This flag will set if the LPI2C master detects a NACK when transmitting an address or data. If a NACK is
expected for a given address (as configured by the command word) then the flag will set if a NACK is not
generated. When set, the master will transmit a STOP condition and will not initiate a new START
condition until this flag has been cleared.
0 Unexpected NACK not detected.
1 Unexpected NACK was detected.
9
SDF
STOP Detect Flag
This flag will set when the LPI2C master generates a STOP condition.
0 Master has not generated a STOP condition.
1 Master has generated a STOP condition.
8
EPF
End Packet Flag
This flag will set when the LPI2C master generates either a repeated START or a STOP condition. It does
not set when the master first generates a START condition.
0 Master has not generated a STOP or Repeated START condition.
1 Master has generated a STOP or Repeated START condition.
Table continues on the next page...
Memory Map and Registers
K32 L2A Reference Manual, Rev. 2, 01/2020
704 NXP Semiconductors