NXP Semiconductors K32 L2A Series, Reference Manual, Page: 977 / 1379

Chapter 37
Power Management Controller (PMC)
37.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances, see the chip configuration information.
The power management controller (PMC) contains the internal voltage regulator, power
on reset (POR), and low voltage detect system (LVD) and high voltage detect system
(HVD) for the VDD domain.
See AN4503: Power Management for Kinetis MCUs for further details on using the
PMC.
37.2 Features
A list of included PMC features can be found here.
• Internal voltage regulator
• Active POR providing brown-out detect
• Low-voltage detect (LVD) on VDD supporting two low-voltage trip points with four
warning levels per trip point
• High-voltage detect (HVD) on VDD supporting two high-voltage trip points
37.3 Low-voltage detect (LVD) system
This device includes a system to guard against low-voltage conditions on the VDD
supply. When the VDD supply falls below a specific trip point, the LVD circuit puts the
device into a reset state, preventing the device from attempting to operate below its
operating voltage range.
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 977