NXP Semiconductors K32 L2A Series, Reference Manual, Page: 484 / 1379

(in T=1 mode). Other errors are stored as status for software to be aware of their
occurrence. The status of the receiver operation is intimated to software via maskable
interrupts.
In addition to the above blocks, the module also contains the 8-bit LRC and the 16-bit
CRC blocks that are common to the transmitter and receiver. Both transmitter and
receiver can use the LRC and CRC blocks and can insert the LRC or CRC into the byte
stream or check the validity of the input stream using the LRC and CRC values received.
Since transmit and receive operations are mutually exclusive, common LRC and CRC
blocks for the transmitter and receiver can be used.
The Smart Card interface signals, except IO, which is controlled by the transmitter and
receiver; are generated by the port control block which controls the assertion and de-
assertion of the clock, reset and VCC signals to Smart Card. It can do so manually
(software needs to explicitly write the necessary bits) or using auto power down wherein
the module can itself power down the Smart Card when configured to do so by software.
The port control block can also detect the Smart Card presence and generate necessary
interrupts to indicate the same.
21.4 Signal Description
The following table shows the user-accessible signals available on EMV SIM. See the
chip-level specification to find out which signals are actually connected to the external
pins.
Table 21-1. EMV SIM Signal Description
Signal Description I/O
EMVSIM_SCLK Card Clock. Clock to Smart Card. O
EMVSIM_SRST Card Reset. Reset signal to Smart Card O
EMVSIM_VCC_EN Card Power Enable. This signal controls
the power to Smart Card O
EMVSIM_IO Card Data Line. Bi-directional data line. I/O
EMVSIM_PD Card Presence Detect. Signal indicating
presence or removal of card I
Signal Description
K32 L2A Reference Manual, Rev. 2, 01/2020
484 NXP Semiconductors