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23.5 Flash Access Control (FAC) Function
The Flash Access Control (FAC) is a configurable memory protection scheme optimized
to allow end users to use software libraries while offering programmable restrictions to
these libraries. The flash memory is divided into equal size segments that provide
protection to proprietary software libraries. The protection of these segments is
controlled: the FAC provides a cycle-by-cycle evaluation of the access rights for each
transaction routed to the on-chip flash memory. Two levels of vendors can add their
proprietary software to a device; FAC protection of segments for each level are defined
once, using the PGMONCE command.
Flash access control aligns to the 3 privilege levels supported by Arm Cortex-M family
products:
• Most secure state is supervisor/privileged secure: allows execute-only and provides
supervisor-only access control.
• Mid-level state is execute-only.
• Unsecure state is where no access control states are set.
Features:
• Lightweight access control logic for on-chip flash memory
• Flash address space divided into (32 or 64) equal-sized segments (segment size is
defined as flash_size [bytes]/(32 or 64))
• Separate control bits for supervisor-only access and execute-only access per segment
• Access control evaluated on each bus cycle routed to the flash
• Access violation errors terminate the bus cycle and return zeroes for read data
• Programming model allows 2 levels of protected segments
23.5.1 Memory map and register definitions
The FAC registers are documented in the FTFA chapter.
23.5.2 FAC functional description
The access control functionality is implemented in 2 separate blocks within the SoC. The
Flash Management Unit (FMU) includes non-volatile configuration information that is
retrieved during reset and and sent to the platform to control access to the flash array
during normal operation.
Chapter 23 Flash Memory Controller (FMC)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
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Summary of Contents for K32 L2A Series
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