NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1214 / 1379

The TRNG is designed to operate as a slave module on the standard IP Slave Bus. By
understanding the TRNG register descriptions in "TRNG Register Descriptions" section
below, the TRNG module can be controlled via the IP slave bus. In order to write to most
TRNG registers, the MCTL register must be initialized in programming mode as
described in the "TRNG Register Descriptions" section. At Power On Reset (POR), the
TRNG resets to programming mode. And the it will not generate entropy until it is out of
programming mode (in run mode) and access to Entropy Registers have been enabled.
Here is an example program flow of using the TRNG.
• After POR the TRNG will be reset into programming mode with the OK to stop bit
set(MCTL[TSTOP_OK]=1). The TRNG must be put into Run Mode for Entropy
Generation to begin (MCTL[PRGM]=0). Additionally, in order to have access to the
Entropy registers and other critical TRNG registers, the TRNG access bit must be set
(MCTL[TRNG_ACC]=1). Using the default self test limits that exist after bootup,
the entropy valid bit can be polled until asserted (MCTL[ENT_VAL]=1).
Alternatively, if using the interrupt, and the interrupts are enabled via the
INT_MASK register and the ipi_rng_int_b is asserted when MCTL[ENT_VAL]=1.
• After the polling completes, the 512-bit entropy generated by the TRNG can be read.
The values can be read in any order from entropy register 0 to register 15 (ENT0 to
ENT 15). After reading ENT 15, the old entropy value is reset and a new entropy
value is generated.
NOTE
Reading ENT 15always resets the entropy, so should
always be read last.
• You can poll again for the new entropy value or you can use the Interrupt Status
Register to handle reading the entropy values when the entropy valid interrupt is
triggered.
• The interrupt can be masked or cleared as needed. See the Interrupt Status Register
description.
• To change the self-test limits,the seed counters, how fast the entropy is generated,
and how entropy is sampled, see the register description section. In particular, see the
the TRNG Frequency Count Minimum Limit Register (FRQMIN), the seed control
register(SCML), the statistical run length registers, and other parameter registers.
• Once in Run Mode, the entropy is re-generated automatically after ENT 15 is read.
To stop the TRNG or access to TRNG registers at any point while in running mode,
you can always set MCTL[TRNG_ACC]=0. Setting the TRNG back to programming
mode (MCTL[PRGM]=1) also achieves the purpose of stopping entropy generation.
Standalone True Random Number Generator (SA-TRNG).
K32 L2A Reference Manual, Rev. 2, 01/2020
1214 NXP Semiconductors