NXP Semiconductors K32 L2A Series, Reference Manual, Page: 986 / 1379

PMC_LVDSC2 field descriptions (continued)
Field Description
This write-only field is used to acknowledge low voltage warning errors. Write 1 to clear LVWF. Reads
always return 0.
5
LVWIE
Low-Voltage Warning Interrupt Enable
Enables hardware interrupt requests for LVWF.
0 Hardware interrupt disabled (use polling)
1 Request a hardware interrupt when LVWF = 1
4–2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
LVWV Low-Voltage Warning Voltage Select
Selects the LVW trip point voltage (V
LVW
). The actual voltage for the warning depends on LVDSC1[LVDV].
00 Low trip point selected (V
LVW
= V
LVW1
)
01 Mid 1 trip point selected (V
LVW
= V
LVW2
)
10 Mid 2 trip point selected (V
LVW
= V
LVW3
)
11 High trip point selected (V
LVW
= V
LVW4
)
37.6.5 Regulator Status And Control register (PMC_REGSC)
The PMC contains an internal voltage regulator. The voltage regulator design uses a
bandgap reference that is also available through a buffer as input to certain internal
peripherals, such as the CMP and ADC. The internal regulator provides a status bit
(REGONS) indicating the regulator is in run regulation.
NOTE
This register is reset on Chip Reset Not VLLS and by reset
types that trigger Chip Reset not VLLS. See the Reset section
details for more information.
Address: 4007_D000h base + 10h offset = 4007_D010h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory map and register descriptions
K32 L2A Reference Manual, Rev. 2, 01/2020
986 NXP Semiconductors