NXP Semiconductors K32 L2A Series, Reference Manual, Page: 391 / 1379

18.4.5 DAC Control Register 1 (DACx_C1)
NOTE
Do not use 32- or 16-bit accesses to this register.
Address: 4006_A000h base + 22h offset = 4006_A022h
Bit 7 6 5 4 3 2 1 0
Read
DMAEN
0
DACBFWM DACBFMD DACBFEN
Write
Reset 0 0 0 0 0 0 0 0
DACx_C1 field descriptions
Field Description
7
DMAEN
DMA Enable Select
0 DMA is disabled.
1 DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The
interrupts will not be presented on this module at the same time.
6–5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
4–3
DACBFWM
DAC Buffer Watermark Select
Controls when SR[DACBFWMF] is set. When the DAC buffer read pointer reaches the word defined by
this field, which is 1–4 words away from the upper limit (DACBUP), SR[DACBFWMF] will be set. This
allows user configuration of the watermark interrupt.
00 1 word
01 2 words
10 3 words
11 4 words
2–1
DACBFMD
DAC Buffer Work Mode Select
00 Normal mode
01 Swing mode
10 One-Time Scan mode
11 Reserved
0
DACBFEN
DAC Buffer Enable
0 Buffer read pointer is disabled. The converted data is always the first word of the buffer.
1 Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means
converted data can be from any word of the buffer.
Chapter 18 12-bit Digital-to-Analog Converter (DAC)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 391