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Operating Mode
Section 7-2
Timing Chart
MC Unit and CPU Unit
Process Cycle
• Do NOT set the same Cycle Time as the Unit Cycle of the MC Unit or
the Cycle Time of [1/integer] multiple when using the Minimum Cycle
Time setting.
• The CPU Unit and MC Unit exchange data in the asynchronous Bus
system via shared memory. When the timings of both Units for access-
ing the shared memory overlap, the Unit that accessed later will not be
able to exchange data in that processing cycle.
• If he CPU Unit accessed later than the MC Unit, the CPU Unit will be
able to access the memory in the next cycle. On the other hand, if the
MC Unit accessed later than the CPU Unit and the access timings
overlap between them in the next cycle, the MC Unit will not be able to
access the memory in the next cycle.
• MC Unit executes internal processing in a constant Unit Cycle 1 ms,
2 ms, 3 ms, 4 ms, 6 ms, or 8 ms depending on the settings such as the
number of axes, number of tasks, and number of parallel branches.
• When using the Minimum Cycle Time setting, the timings of the Units
to access the shared memory will overlap in every cycle, which may
cause the case where the MC Unit cannot exchange data at all.
In Automatic Mode
(R1)
In Servo lock status
(R2)
Level H
Command enable
(R3)
Program setting button
Start button
Pause button
Start Mode 1
(n+4.02)
Motion program start
(n+4.01)
Motion program completed
(n+17.02)
Motion program operating
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