![background image](http://html1.mh-extra.com/html/omron/cs1w-mch71/cs1w-mch71_operation-manual_742367422.webp)
377
Overview
Section 7-1
Allocation of Custom Bit Area and Custom Data Area
The Custom bit area (brevity code: x) and Custom data area (brevity code: d)
are the areas for controls and statuses related to axes. With [Bit area type
(m+0)] and [Data area type (m+2)] of [Unit area range setting] in the allocated
DM area words, the area types on the CPU Unit are specified. With [Bit area
first address (m+1)] and [Data area first address (m+3)], the first address of
each area on the CPU Unit is specified.
Up to the words for the biggest axis number set to other than [0:Unused] in the
axis allocation parameter [P1AA01: Physical axis setting] are allocated.
Custom I/O Area
a_A
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+4 and m+5
Unit version 2.1 or later: m+4, m+5, m+74, and m+75
CIO, WR, DM, EM
a_B
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+6 and m+7
Unit version 2.1 or later: m+6, m+7, m+76, and m+77
CIO, WR, DM, EM
a_C
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+8 and m+9
Unit version 2.1 or later: m+8, m+9, m+78, and m+79
CIO, WR, DM, EM
a_D
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+10 and m+11
Unit version 2.1 or later: m+10, m+11, m+80, and m+81
CIO, WR, DM, EM
a_E
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+12 and m+13
Unit version 2.1 or later: m+12, m+13, m+82, and m+83
CIO, WR, DM, EM
a_F
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+14 and m+15
Unit version 2.1 or later:m+14, m+15, m+84, and m+85
CIO, WR, DM, EM
a_G
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+16 and m+17
Unit version 2.1 or later:m+16, m+17, m+86, and m+87
CIO, WR, DM, EM
a_H
Depends on the general I/O area range setting.
Unit version 2.0 or earlier: m+18 and m+19
Unit version 2.1 or later: m+18, m+19, m+88, and m+89
CIO, WR, DM, EM
Area
Brevity
CPU Unit’s Addresses
Name
Function
Bit area type
Area type specification on the CPU Unit
0: Not used (no transfer)
1: CIO
2: WR
3 and higher: Reserved for system
Bit area first
address
First address specification on the CPU Unit
0000H-(Upper limit varies depending on bit area type.)
Data area type
Area type specification on the CPU Unit
0: Not used (no transfer)
1: CIO
2: WR
3: DM
4: EM (Fix banks at 0 in the EM area)
5: and above: Reserved for system.
Data area first
address
First address specification on the CPU Unit
0000H-(Upper limit varies depending on data area type.)
Содержание CS1W-MCH71 -
Страница 2: ...CS1W MCH71 CJ1W MCH71 Motion Control Unit Operation Manual Revised June 2008 ...
Страница 3: ...iv ...
Страница 29: ...xxx ...
Страница 33: ...xxxiv ...
Страница 35: ...xxxvi ...
Страница 39: ...xl ...
Страница 69: ...24 Performance Section 1 7 ...
Страница 99: ...54 Connecting MECHATROLINK Devices Section 3 5 ...
Страница 283: ...238 Saving Data Section 5 4 ...
Страница 417: ...372 Command Details Section 6 3 ...