Icon
Description
Binary input signal derived from an external output
signal
Internal input signal
Internal output signal
Analog input signal
Reset/Block a logic element
AND gate
OR gate
XOR gate
Negation
Threshold stage exceeded
Threshold stage exceeded with
reset of input
Threshold stage shortfall
Threshold stage shortfall with
reset of input
Threshold stage exceeded with
dropout delay
Threshold stage exceeded with
dropout delay and reset of input
Threshold stage shortfall with
Dropout delay
Threshold stage shortfall with
dropout delay and reset of input
Comparators
Pickup delay
Dropout delay
Pickup and dropout delay
Appendix
A.3 Typographic and Symbol Conventions
1210
SIPROTEC 5, High-Voltage Bay Controller, Manual
C53000-G5040-C015-9, Edition 11.2017
Summary of Contents for 6MD85
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