Deserial Serial Peripheral Interface (DSPI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
20-47
lists the DSPI D connections.
20.4.4.7
Multiple Transfer Operation (MTO)
In DSI configuration the MTO feature allows for multiple DSPIs within the MCU to be chained together
in a parallel or serial configuration. The parallel chaining allows multiple DSPIs internal to the MCU and
multiple SPI devices external to the MCU to share SCK and PCS signals thereby saving pins. The serial
chaining allows bits from multiple DSPIs to be concatenated into a single DSI frame. MTO is enabled by
setting the MTOE bit in the DSPI
x
_DSICR.
In parallel and serial chaining there is one bus master and multiple bus slaves. The bus master initiates and
controls the transfers, but the DSPI slaves generate trigger signals for the bus DSPI master when an
internal condition in the slave warrants a transfer. The DSPI slaves also propagate triggers from other
slaves to the master. When a DSPI slave detects a trigger signal on its
ht
input, the slave generates a trigger
signal on the MTRIG output.
The SIU_DISR must be configured to use serial or parallel chaining.
Table 20-22. DSPI D Connectivity Table
Connected to:
DSPI D
IN[
n
]
DSPI D
OUT[
n
]
Connected to:
eTPUA output channel 21
0
0
Input 3 on IMUX for external IRQ[14]
eTPUA output channel 20
1
1
Input 3 on IMUX for external IRQ[15]
eTPUA output channel 19
2
2
no connect
eTPUA output channel 18
3
3
no connect
eTPUA output channel 17
4
4
Input 3 on IMUX for external IRQ[2]
eTPUA output channel 16
5
5
Input 3 on IMUX for external IRQ[3]
eMIOS output channel 11
6
6
Input 3 on IMUX for external IRQ[4]
eMIOS output channel 10
7
7
Input 3 on IMUX for external IRQ[5]
eMIOS output channel 13
8
8
Input 3 on IMUX for external IRQ[6]
eMIOS output channel 12
9
9
Input 3 on IMUX for external IRQ[7]
eTPUA output channel 29
10
10
Input 3 on IMUX for external IRQ[8]
eTPUA output channel 28
11
11
Input 3 on IMUX for external IRQ[9]
eTPUA output channel 27
12
12
Input 3 on IMUX for external IRQ[10]
eTPUA output channel 26
13
13
Input 3 on IMUX for external IRQ[11]
eTPUA output channel 25
14
14
eMIOS input channel 15,
Input 3 on IMUX for external IRQ[12]
eTPUA output channel 24
15
15
eMIOS input channel 14,
Input 3 on IMUX for external IRQ[13]
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...
