NXP Semiconductors MPC5566, Reference Manual

Page: 421 / 1268

Interrupt Controller (INTC)
MPC5566 Microcontroller Reference Manual, Rev. 2
10-8 Freescale Semiconductor
EMIOS[15]_ P eMIOS channel O
IRQ[1]_ A External interrupt request I — / WKPCFG — / WKPCFG
CNRXD A CAN D receive I
GPIO[194] G GPIO I/O
BOOTCFG[0:1]_ P Boot configuration input I
IRQ[2:3]_ A External interrupt request I BOOTCFG / Down — / Down
GPIO[211:212] G GPIO I/O
PLLCFG[0]_ P FMPLL mode selection I
IRQ[4]_ A External interrupt request I PLLCFG / Up — / Up
GPIO[208] G GPIO I/O
PLLCFG[1]_ P FMPLL reference selection I
IRQ[5]_ A External interrupt request I PLLCFG / Up — / Up
GPIO[209] G GPIO I/O
TCRCLKB_ P eTPU B TCR clock I
IRQ[6]_ A External interrupt request I — / Up — / Up
GPIO[146] G GPIO I/O
TCRCLKA_ P eTPU A TCR clock I
IRQ[7]_ A External interrupt request I
GPIO[113] G GPIO I/O
ETPUA[20]_ P eTPU A channel I/O
IRQ[8]_ A External interrupt request I — / Up — / Up
GPIO[134] G GPIO I/O
ETPUA[21]_ P eTPU A channel I/O
IRQ[9]_ A External interrupt request I
GPIO[135] G GPIO I/O
ETPUA[22]_ P eTPU A channel I/O
IRQ[10]_ A External interrupt request I
— / WKPCFG — / WKPCFG
GPIO[136] G GPIO I/O
ETPUA[23]_ P eTPU A channel I/O
IRQ[11]_ A External interrupt request I
GPIO[137] G GPIO I/O
ETPUA[24:27]_ P eTPU A channel (output only) O
IRQ[12:15]_ A External interrupt request I
GPIO[138:141]_ G GPIO I/O
1
For each pin in the table, each line in the function column is a separate function muxed to the pin. For all device I/O
pins, the selection of a primary, secondary or tertiary function is done in the SIU module except where explicitly noted.
Table 10-2. External Interrupt Signals (continued)
Function
1
P/A/G
2
Description
I/O
Type
Reset
Function/
State
3
Post Reset
Function/
State
4