NXP Semiconductors MPC5566, Reference Manual

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External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
12-48 Freescale Semiconductor
• 32-bit access, address bits 30–31 must equal zero
• For burst accesses of any size, address bits 29–31 must equal zero
The EBI never generates a misaligned external access, so a multi-master system with two MCUs can never
have a misaligned external access. In the erroneous case that an externally-initiated misaligned access does
occur, the EBI errors the access (by asserting TEA externally) and does not initiate the access on the
internal bus.
The EBI requires that the portion of the data bus used for a transfer to/from a particular port size be fixed.
A 32-bit port must reside on data bus bits 0–31, and a 16-bit port must reside on bits 0–15.
The figures and tables in this section use the following conventions:
• The most significant byte of a 32-bit operand is OP0; OP3 is the least significant byte.
• Depending on the address of the access, the two bytes of a 16-bit operand are:
— OP0 (most significant) and OP1; or
— OP2 (most significant) and OP3
• The single byte of a byte-length operand is OP0, OP1, OP2, or OP3, depending on the address of
the access.
The convention can be seen in Figure 12-30 .
Figure 12-30. Internal Operand Representation
OP0 OP1 OP2
0 31
32-bit
16-bit
Byte
OP0
OP1
OP2
OP3
OP0 OP1
OP2 OP3
OP3