NXP Semiconductors MPC5566, Reference Manual

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External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 12-63
Figure 12-40. Basic Flow Diagram of an External Master Write Cycle
External Master EBI (Slave)
No
Yes
External
Arbitration*
?
Request Bus (BR)
Receives Bus Grant (BG)
Asserted from External Arbiter**
Receives BB Negated for 2 Cycles
Negates BR if No Other Requests
No
Yes
External
Master has
Priority***
Negates BG if Asserted
Asserts Bus Busy (BB)
if No Other Master is Driving
Assert Transfer Start (TS)
Drives Address and Attributes
?
Receives Address
No
Yes
Address
in Internal Memory
Map
?
Other Shared Device
Asserts
Transfer Acknowledge (TA)
Receives Data
Drives Data
Receives Data
Asserts
Transfer Acknowledge (TA)
This refers to whether the external master device is configured for external or internal arbitration.
*
External arbiter is the EBI unless a central arbiter device is used.
**
Determined by the internal arbiter of the external master device.
***