NXP Semiconductors MPC5566, Reference Manual

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Enhanced Direct Memory Access (eDMA)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 9-33
A minor loop interaction is defined as the number of bytes to transfer ( n bytes) divided by the
transfer size. Transfer size is defined as the following:
if (SSIZE < DSIZE)
transfer size = destination transfer size (# of bytes)
else
transfer size = source transfer size (# of bytes)
Minor loop TCD variables are SOFF, SMOD, DOFF, DMOD, NBYTES, SADDR, DADDR,
BWC, ACTIVE, AND START. Major loop TCD variables are DLAST, SLAST, CITER,
BITER, DONE, D_REQ, INT_MAJ, MAJOR_LNKCH, and INT_HALF.
For descriptors where the sizes are not equal, multiple access of the smaller size data are
required for each reference of the larger size. As an example, if the source size references 16-bit
data and the destination is 32-bit data, two reads are performed, then one 32-bit write.
• TCD local memory
— Memory controller : This logic implements the required dual-ported controller, handling
accesses from both the eDMA engine as well as references from the slave bus. As noted earlier,
in the event of simultaneous accesses, the eDMA engine is given priority and the slave
transaction is stalled. The hooks to a BIST controller for the local TCD memory are included
in this module.
— Memory array : The TCD is implemented using a single-ported, synchronous compiled RAM
memory array.
9.3.2 eDMA Basic Data Flow
The basic flow of a data transfer can be partitioned into three segments. As shown in Figure 9-24 , the first
segment involves the channel service request. In the diagram, this example uses the assertion of the eDMA
peripheral request signal to request service for channel
n . Channel service request via software and the
TCDn.START bit follows the same basic flow as an eDMA peripheral request. The eDMA peripheral
request input signal is registered internally and then routed to through the eDMA engine, first through the
control module, then into the program model/channel arbitration module. In the next cycle, the channel
arbitration is performed, either using the fixed-priority or round-robin algorithm. After the arbitration is
complete, the activated channel number is sent through the address path and converted into the required
address to access the TCD local memory. Next, the TCD memory is accessed and the required descriptor
read from the local memory and loaded into the eDMA engine address path channel{x,y} registers. The
TCD memory is organized 64-bits in width to minimize the time needed to fetch the activated channel’s
descriptor and load it into the eDMA engine address path channel{x,y} registers.