NXP Semiconductors MPC5566, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5566 Microcontroller Reference Manual, Rev. 2
20-12 Freescale Semiconductor
The following table describes the field in the DSPI transfer count register:
20.3.2.3 DSPI Clock and Transfer Attributes Registers 0–7 (DSPI x _CTAR n )
The DSPI modules each contain eight clock and transfer attribute registers (DSPI x _CTAR n ) which are
used to define different transfer attribute configurations. Each DSPI x _CTAR controls:
• Frame size
• Baud rate and transfer delay values
• Clock phase
• Clock polarity
• MSB or LSB first
DSPI x _CTARs support compatibility with the QSPI module in the MPC5xx family of MCUs. See
Section 20.5.4, “MPC5xx QSPI Compatibility with the DSPI ,” for a discussion on DSPI and QSPI
compatibility. At the initiation of an SPI or DSI transfer, control logic selects the DSPI x _CTAR that
contains the transfer attributes. Do not write to the DSPI x _CTARs while the DSPI is running.
In master mode, the DSPI x _CTAR n registers define combinations of transfer attributes such as frame size,
clock phase and polarity, data bit ordering, baud rate, and various delays. In slave mode, a subset of the bit
fields in the DSPI
x _CTAR0 and DSPI x _CTAR1 registers are used to set the slave transfer attributes. See
the individual bit descriptions for details on which bits are used in slave modes.
Address: Base + 0x0008 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
SPI_TCNT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-4. DSPI Transfer Count Register (DSPI x _TCR)
Table 20-4. DSPI x _TCR Field Descriptions
Field Description
0–15
SPI_TCNT
[0:15]
SPI transfer counter. Counts the number of SPI transfers the DSPI makes. The SPI_TCNT field is incremented
every time the last bit of an SPI frame is transmitted. A value written to SPI_TCNT presets the counter to that value.
SPI_TCNT is reset to zero at the beginning of the frame when the CTCNT field is set in the executing SPI
command. The transfer counter ‘wraps around,’ incrementing the counter past 65535 resets the counter to zero.
16–31 Reserved