NXP Semiconductors MPC5566, Reference Manual

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MPC5566 Reference Manual Revision History
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor C-8
In Section “eTPU Operation Overview”, changed:
• FROM: “A thread be interrupted only by resetting the entire eTPU module.”
• TO: “The core can terminate the thread by writing 1 to the FEND bit in the ETPUECR register.”
Chapter 18
“Enhanced Time
Processing Unit”
(continued)
In Section “eTPU Engine Configuration Register (ETPU_ECR)”:
• In the MDIS bit, changed the Note to read:
“After MDIS has been switched from 1 to 0 or vice-versa, do not switch its value again until STF
switches to the same value.”
• In the STF bit, removed the words “or after the STAC but stop has been asserted” from the STF
bit description.
In Table, “ETPU_TBR Field Descriptions, in the TCR2CTL field, removed the phrase: “TCR2 can
also be clocked by an internal peripheral timebase signal.”
Chapter 19
“Enhanced Queued
Analog-to-Digital
Converter
Changes to Table 18-11, ETPU_TBCR Field Descriptions: TCR2CTL field, AM=0 column: 101
Peripheral time base clock source, 110 Do not use with AM=1. Moved table note into AM=1 column.
Chapter 20
“Deserial Serial
Peripheral Interface”
Changed the NOTE in the DSPI_PUSHR register: From: “Only the TXDATA field is used for slaves.”
To: “TXDATA is used in master and slave modes.”
Section 19.5.5.2, “Address Calculation for the First-in Entry and Last-in Entry in the RX FIFO ”
Changed from: First-in entry address = TX FIFO base + [4
x
(POPNXTPTR)]
to:
First-in entry address = RX FIFO base + [4
x
(POPNXTPTR)]
Numbered and edited the steps in section ‘How to Change Queues.”
Changed the following section titles:
• From: Modified SPI/DSI Transfer Format (MTFE = 1, CPHA = 0)
To: Modified Transfer Format Enabled (MTFE = 1) and
Classic SPI Transfer Format Cleared (CPHA = 0) for SPI and DSI
• From: Modified SPI/DSI Transfer Format (MTFE = 1, CPHA = 1)
To: Modified Transfer Format Enabled (MTFE = 1) with Classic SPI Transfer Format Set
(CPHA = 1) for SPI and DSI
Chapter 21
“Enhanced Serial
Communication Interface”
No changes.
Chapter 22
“FlexCAN2 Controller
Area Network”
No changes.
Chapter 23
“Voltage Regulator
Controller and POR”
No changes.
Chapter 24
“IEEE 1149.1 Test Access
Port Controller”
No changes.
Chapter 25
“Nexus Development
Interface”
No changes.
Table C-1. MPC5566 Changes Between Revisions 1 and 2 (continued)
Chapter Description