NXP Semiconductors MPC5566, Reference Manual

Page: 336 / 1268

Crossbar Switch (XBAR)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 7-5
Addess: Base + 0x0000 (XBAR_MPR0)
Base + 0x0100 (XBAR_MPR1)
Base + 0x0300 (XBAR_MPR3)
Base + 0x0600 (XBAR_MPR6)
Base + 0x0700 (XBAR_MPR7) Access: Supervisor R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
MSTR6
(not used)
0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0
MSTR3
0
MSTR2
0
MSTR1
0
MSTR0
W
Reset 0 0 1 1 0 0 1 0 0 0 0 1 0 0 0 0
Figure 7-2. Master Priority Registers (XBAR_MPR n )
Table 7-4. XBAR_MPR n Descriptions
Field Description
0–16 Reserved, must be cleared.
17–19
MSTR3
Master 3 priority. Set the arbitration priority for master port 3 on the associated slave port.
000 This master has the highest priority when accessing the slave port.
100 This master has the lowest priority when accessing the slave port.
101–111
Invalid values
20 Reserved, must be cleared.
21–23
MSTR2
Master 2 priority. Set the arbitration priority for master port 2 on the associated slave port.
000 This master has the highest priority when accessing the slave port.
100 This master has the lowest priority when accessing the slave port.
101–111
Invalid values
24 Reserved, must be cleared.
25–27
MSTR1
Master 1 priority. Set the arbitration priority for master port 1 on the associated slave port.
000 This master has the highest priority when accessing the slave port.
100 This master has the lowest priority when accessing the slave port.
101–111
Invalid values
....
....
....