NXP Semiconductors MPC5566, Reference Manual

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MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 9-1
Chapter 9
Enhanced Direct Memory Access (eDMA)
9.1 Introduction
This chapter describes the enhanced Direct Memory Access (eDMA) controller, a second-generation
module capable of performing complex data transfers with minimal intervention from a host processor.
The enhanced direct memory access (eDMA) controller hardware microarchitecture includes a DMA
engine which performs source and destination address calculations, and the actual data movement
operations, along with SRAM-based local memory containing the transfer control descriptors (TCD) for
the channels.
Figure 9-1 is a block diagram of the eDMA module.
Figure 9-1. eDMA Block Diagram
Slave Interfa
c
e
eDMA
eDMA done
Sy
stem Bus
Data path
Control
Address
Program model and
Slave write data
Slave write address
Bus write data
Slave read data
Bus address
eDMA Engine
TCD0
TCD n -1*
eDMA peripheral
Bus read data
channel arbitration
request
path
SRAM
Transfer Control Descriptor
(TCD)
SRAM
* n = 64 channels