MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
22-35
3. Initialize CANx_MCR bits MBFEN, SRXDIS, and WRNEN.
The initialization of FlexCAN registers for either global or individual acceptance masking depends
on the configuration of MBFEN:
— If MBFEN is negated, initialize CANx_RXGMASK, CANx_RX14MASK, and
CANx_RX15MASK registers for acceptance mask.
— If MBFEN is asserted, initialize CANx_RXIMR[0-63] for individual acceptance masking.
4. Set required mask bits in CAN
x
_IMRH and CAN
x
_IMRL registers (for all MBs interrupts), and
in CAN
x
_CR (for bus off and error interrupts).
5. Negate the CAN
x
_MCR[HALT] bit.
Starting with this last event, FlexCAN2 attempts to synchronize with the CAN bus.
22.5.2
FlexCAN2 Addressing and RAM Size
There are 1024 bytes of RAM for a maximum of 64 message buffers. You can program the maximum
number of message buffers (MBs) using the MAXMB field in the CAN
x
_MCR. For a 1024-byte RAM
configuration, MAXMB can be any number from 0
–
63.
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...
