External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
12-38
Freescale Semiconductor
Figure 12-21. Read-After-Write to the Same CS Bank
12.4.2.5
Burst Transfer
The EBI supports wrapping 32-byte critical-doubleword-first burst transfers. Bursting is supported only
for internally-requested cache-line size (32-byte) read accesses to external devices that use the chip
selects
1
. Accesses from an external master or to devices operating without a chip select are always single
beat. If an internal request to the EBI indicates a size of less than 32 bytes, the request is fulfilled by
running one or more single-beat external transfers, not by an external burst transfer.
1. Except for the special case of a 32-bit non-chip select access in 16-bit data bus mode. See Section 12.4.2.11.
ADDR[8:31]
TS
DATA[0:31]
TA
RD_WR
DATA is valid
TSIZ[0:1]
BDIP
WE
CS
[
n
]
DATA is valid
CLKOUT
’00’
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...
