NXP Semiconductors MPC5566, Reference Manual

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Fast Ethernet Controller (FEC)
MPC5566 Microcontroller Reference Manual, Rev. 2
15-10 Freescale Semiconductor
9 WBEN Global write burst enable to XBAR slave port designated by FXSBE n
0 = Write bursting to all XBAR slave ports is disabled.
1 = Write bursting is enabled to any XBAR slave port whose FXSBE
n bit is
asserted.
10 ACCERR Accumulate error - This bit determines whether an error response for the
first half of the write burst is accumulated to the second half of the write burst
or discarded. In order to complete the burst, the FEC interface to the system
bus responds by indicating that the first half of the burst completed without
error before it actually writes the data so that it can fetch the second half of
the write data from the FIFO. When actually written onto the system bus, the
first half of the write burst can have an error. Because this half initially
responded without an error to the FIFO, the error is discarded or
accumulated with the error response for the second half of the burst.
0 Any error to the first half of the write burst is discarded.
1 Any actual error response to the first half of the write burst is accumulated
in the second half's response. In other words, an error response to the
first half is seen in the response to the second half, even if the second
half does not error.
11–31 — Reserved, must be cleared.
Table 15-3. FBOMCR Field Descriptions (continued)
Bits Name Description