NXP Semiconductors MPC5566, Reference Manual

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System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-85
Refer to Table 6-19 for bit field definitions. Table 6-109 lists the PA fields for
EMIOS[19]_ETPUB[3]_GPIO[198].
6.3.1.110 Pad Configuration Registers 199–200 (SIU_PCR199–SIU_PCR200)
The SIU_PCR199–SIU_PCR200 registers control the function, direction, and electrical attributes of
EMIOS[20:21]_ETPUB[4:5]_GPIO[199:200]. Both the input and output functions of EMIOS[20:21] are
connected. Only the output channels of ETPUB[4:5] are connected.
Figure 6-111. EMIOS[20:21]_ETPUB[4:5]_GPIO[199:200]
Pad Configuration Register (SIU_PCR199–SIU_PCR200)
Refer to Table 6-19 for bit field definitions. Table 6-110 lists the PA fields for
EMIOS[20:21]_ETPUB[4:5]_GPIO[199:200].
Table 6-109. PCR198 PA Field Definitions
PA Field Pin Function
0b00 GPIO[198]
0b01 EMIOS[19]
0b10 ETPUB[3]
0b11 EMIOS[19]
Address: Base + (0x01CE–0x01D0) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for EMIOS[20:21] or GPIO[199:200] when configured as output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[20:21] or GPIO[199:200] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[20:21] pin is determined by the WKPCFG pin.
Table 6-110. PCR199–PCR200 PA Field Definitions
PA Field Pin Function
0b00 GPIO[199:200]
0b01 EMIOS[20:21]
0b10 ETPUB[4:5]
0b11 EMIOS[20:21]