Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
25-4
Freescale Semiconductor
discontinuities. Thus static code can be traced. The branch trace messaging method uses the
branch/predicate method to reduce the number of generated messages.
— Watchpoint messaging via the auxiliary port. WPM provides visibility of the occurrence of the
eTPU’s’ watchpoints and breakpoints.
— Nexus based breakpoint/watchpoint configuration and single step support.
•
Run-time access to the on-chip memory map via the Nexus read/write access protocol. This feature
supports accesses for run-time internal visibility, calibration variable acquisition, calibration
constant tuning, and external rapid prototyping for powertrain automotive development systems.
•
All features are independently configurable and controllable via the IEEE
®
1149.1 I/O port.
•
The NDI block reset is controlled with JCOMP, power-on reset, and the TAP state machine. These
sources are independent of system reset.
•
System clock locked status indication via MDO0 following power-on reset.
25.1.3
Modes of Operation
The NDI block is in reset when the TAP controller state machine is in the TEST-LOGIC-RESET state. The
TEST-LOGIC-RESET state is entered on the assertion of the power-on reset signal, negation of JCOMP,
or through state machine transitions controlled by TMS. Assertion of JCOMP allows the NDI to move out
of the reset state, and is a prerequisite to grant Nexus clients control of the TAP. Ownership of the TAP is
achieved by loading the appropriate enable instruction for the desired Nexus client in the JTAGC controller
(JTAGC) block when JCOMP is asserted.
Following negation of power-on reset, the NPC remains in reset until the system clock achieves lock. In
PLL bypass mode, the NDI can transition out of the reset state immediately following negation of
power-on reset. Refer to
Section 25.4.5, “System Clock Locked Indication
” for more details.
25.1.3.1
Nexus Reset Mode
In Nexus reset mode, the following actions occur:
•
Register values default back to their reset values.
•
The message queues are marked as empty.
•
The auxiliary output port pins are negated if the NDI controls the pads.
•
The TDO output buffer is disabled if the NDI has control of the TAP.
•
The TDI, TMS, and TCK inputs are ignored.
•
The NDI block indicates to the MCU that it is not using the auxiliary output port. This indication
can be used to three-state the output pins or use them for another function.
25.1.3.2
Full-Port Mode
In full-port mode, all the available MDO pins are used to transmit messages. All trace features are enabled
or can be enabled by writing the configuration registers via the JTAG port. The number of MDO pins
available is 12.
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...
