NXP Semiconductors MPC5566, Reference Manual

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MPC5566 Microcontroller Reference Manual, Rev. 2
22-26 Freescale Semiconductor
22.4.3 Receive Process
The CPU prepares a message buffer for frame reception by executing the following steps:
1. Write the CODE field of the control and status word to keep the RX MB as INACTIVE
(CODE = 0000).
2. Write the ID word.
3. Write the CODE field of the control and status word to mark the MB as EMPTY.
The first and last steps are mandatory.
22.4.3.1 Matching Process
The matching process compares the IDs of all active RX message buffers to newly received frames, so
that, if a match occurs, a newly received frame is transferred (moved in) to the first (that is, lowest entry)
matching MB when the reception queue feature is disabled. Only MBs marked as EMPTY, FULL, or
OVERRUN participate in the internal matching process at the CRC frame field. The internal matching
process takes place every time the receiver receives an error free frame.
The value of the free running timer is written into the TIME STAMP field in the MB. The ID field, the
DATA field (8 bytes at most), and the LENGTH field are stored, the CODE field is updated, and a status
flag is set in CAN
x _IFRL or CAN x _IFRH, and an interrupt is generated if the corresponding interrupt
mask is enabled in CAN x _IMRL/H.
The CPU must read an RX frame from its MB in the following way:
• Control and status word (mandatory, activates internal lock for this buffer)
• ID (optional, needed only if a mask was used)
• DATA field words
• Free running timer (optional, releases internal lock)
Reading the free running timer is not mandatory. If not executed, the MB remains locked, unless the CPU
starts reading another MB. Note that only a single MB is locked at a time. The only mandatory CPU read
operation is of the control and status word, to assure data coherency. If the BUSY bit is set in the CODE
field, then the CPU must defer the access to the MB until this bit is negated.
The CPU must synchronize to frame reception by the status flag bit for the specific MB in one of the
CANx_IFRH and CANx_IFRL registers and not by the control and status word code field of that MB.
Polling the CODE field does not work because after a frame was received and the CPU services the MB
(by reading the C/S word followed by unlocking the MB), the CODE field does not return to EMPTY. It
remains FULL, as explained in
Table 22-5 . If the CPU tries to work around this behavior by writing to the
C/S word to force an EMPTY code after reading the MB, the MB is deactivated from any current matching
process. As a result, a newly received frame matching the ID of that MB can be lost. Never poll by directly
reading the C/S word of the MBs. Instead, read the CANx_IFRH and CANx_IFRL registers.
The received ID field is always stored in the matching MB, thus the contents of the ID field in a MB can
change if the match was due to mask.