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Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-46
Freescale Semiconductor
“ Command Message Format for External Device Operation
.” An external device that only implements
one command buffer can ignore the BN bit.
The limit of two command buffers does not limit the number of result buffers in the slave device.
19.4.1.1.3
Command Execution and Result Return
Commands sent to a specific external command buffer should be executed in the order they were received.
Results generated by the execution of commands in an external command buffer should be returned in the
order that the command buffer received these commands.
19.4.1.1.4
Null and Result Messages
The external device must be capable of correctly processing null messages as specified in the
Section 19.3.2.2, “eQADC Null Message Send Format Register (EQADC_NMSFR)
In case no valid result data is available to be sent to the eQADC, the external device must send data in the
format specified in
Section , “Null Message Format for External Device Operation
In case valid result data is available to sent to the eQADC, the external device must send data in the format
specified in
Section , “Result Message Format for External Device Operation
.”
The BUSY0/1 fields of all messages sent from the external device to the eQADC must be correctly
encoded according to the latest information on the fullness state of the command buffers. For example, if
external command buffer 2 is empty before the end of the current serial transmission and if at the end of
this transmission the external device receives a command to command buffer 2, then the BUSY0 field, that
is to be sent to the eQADC on the next serial transmission, should be encoded assuming that the external
command buffer has one entry.
19.4.1.2
Message Format in eQADC
This section explains the command and result message formats used for on-chip ADC operation and for
external device operation.
A command message is the pre-defined format at which command data is stored in the user command
queues. A command message has 32 bits and is composed of two parts: a CFIFO header and an ADC
command. The size of the CFIFO header is fixed to 6 bits, and it works as inputs to the FIFO control unit.
The header controls when a command queue ends, when it pauses, if commands are sent to internal or
external buffers, and if it can abort a serial data transmission. Information contained in the CFIFO header,
together with the upper bit of the ADC command, is used by the FIFO control unit to arbitrate which
triggered CFIFO transfers the next command. ADC commands are encoded inside the least significant 26
bits of the command message.
A result message is composed of an RFIFO header and an ADC result. The FIFO control unit decodes the
information contained in the RFIFO header to determine the RFIFO to which the ADC result is sent. The
ADC result field is always 16 bits.
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...