NXP Semiconductors MPC5566, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5566 Microcontroller Reference Manual, Rev. 2
20-6 Freescale Semiconductor
20.2 External Signal Description
20.2.1 Signal Overview
Table 20-1 lists off-chip DSPI signals.
20.2.2 Signals and Descriptions
20.2.2.1 Peripheral Chip Select / Slave Select (PCS x [0]_SS )
In master mode, the PCS x [0] signal is a peripheral chip select output that selects the slave device for the
current transmission.
In slave mode, the SS signal is a slave select input signal that allows a SPI master to select the DSPI as the
target for transmission. PCS
x [0]_SS must be configured as input and pulled high. If the internal pullup is
used then the bits in the SIU_PCR must be set (SIU_PCR [WPE = 1], [WPS = 1]).
Set the input buffer enable (IBE) and the output buffer enable (OBE) bits to 1 in the SIU_PCR for all
PCSx[0] pins when the DSPI chip select or slave select primary function is configured for that pin. When
the pin is used for DSPI master mode as a chip select output, set the OBE bit. When the pin is used in DSPI
slave mode as a slave select input, set the IBE bit to 1.
See Section 6.3.1.12, “Pad Configuration Registers (SIU_PCR) ,” for more information.
20.2.2.2 Peripheral Chip Selects 1–3 (PCS x [1:3])
PCS x [1:3] are peripheral chip select output signals in master mode. In slave mode these signals are not
used.
Table 20-1. Signal Properties
Name I/O Type
Function
Master Mode Slave Mode
PCS
x
[ 0]_SS Output / input Peripheral chip select 0 Slave select
PCS
x
[1:3] Output Peripheral chip select 1–3 Unused
1
1
The SIU allows you to select alternate pin functions for the device.
PCS
x
[4]_MTRIG Output Peripheral chip select 4 Master trigger
PCS
x
[5]_PCSS Output Peripheral chip select 5 /
Peripheral chip select strobe Unused
1
SIN
x
Input Serial data in Serial data in
SOUT
x
Output Serial data out Serial data out
SCK
x
Output / input Serial clock (output) Serial clock (input)