NXP Semiconductors MPC5566, Reference Manual

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Interrupt Controller (INTC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 10-9
10.3 Memory Map and Register Definition
Table 10-3 is the INTC memory map.
2
Primary, alternate, or GPIO function. The primary name labels the pin on the PBGA pinout.
3
Terminology is O - output, I - input, Up - weak pullup enabled, Down - weak pulldown enabled, Low - output driven low,
High - output driven high.
4
Function after reset of GPI is general-purpose input.
Table 10-3. INTC Memory Map
Address Register Name Register Description Bits
Base (0xFFF4_8000) INTC_MCR INTC module configuration register 32
Base + 0x0004 — Reserved —
Base + 0x0008 INTC_CPR INTC current priority register 32
Base + 0x000C — Reserved —
Base + 0x0010 INTC_IACKR INTC interrupt acknowledge register
1
1
When the HVEN bit in the INTC_MCR is asserted, a read of the INTC_IACKR has no side effects.
32
Base + 0x0014 — Reserved —
Base + 0x0018 INTC_EOIR INTC end-of-interrupt register 32
Base + 0x001C — Reserved —
Base + 0x0020 INTC_SSCIR0 INTC software set/clear interrupt register 0 8
Base + 0x0021 INTC_SSCIR1 INTC software set/clear interrupt register 1 8
Base + 0x0022 INTC_SSCIR2 INTC software set/clear interrupt register 2 8
Base + 0x0023 INTC_SSCIR3 INTC software set/clear interrupt register 3 8
Base + 0x0024 INTC_SSCIR4 INTC software set/clear interrupt register 4 8
Base + 0x0025 INTC_SSCIR5 INTC software set/clear interrupt register 5 8
Base + 0x0026 INTC_SSCIR6 INTC software set/clear interrupt register 6 8
Base + 0x0027 INTC_SSCIR7 INTC software set/clear interrupt register 7 8
Base + (0x0028–0x003F) — Reserved —
Base + (0x0040–0x01A7) INTC_PSR n INTC priority select registers
2
0 – 329
2
The PRI fields are “Reserved” for peripheral interrupt requests whose vectors are labeled as Reserved in Table 10-9 .
8