NXP Semiconductors MPC5566, Reference Manual

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System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-58 Freescale Semiconductor
6.3.1.69 Pad Configuration Register 103 (SIU_PCR103)
The SIU_PCR103 register controls the function, direction, and electrical attributes of
SINB_PCSC[2]_GPIO[103].
Figure 6-70. SINB_PCSC[2]_GPIO[103] Pad Configuration Register (SIU_PCR103)
Refer to Table 6-19 for bit field definitions. Table 6-69 lists the PA fields for SINB_PCSC[2]_GPIO[103].
6.3.1.70 Pad Configuration Register 104 (SIU_PCR104)
The SIU_PCR104 register controls the function, direction, and electrical attributes of
SOUTB_PCSC[5]_GPIO[104].
Figure 6-71. SOUTB_PCSC[5]_GPIO[104] Pad Configuration Register (SIU_PCR104)
Address: Base + 0x010E Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as SINB, clear the OBE bit to 0. When configured as PCSC[2], the OBE bit has no effect.
When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
Table 6-69. PCR103 PA Field Definitions
PA Field Pin Function
0b00 GPIO[103]
0b01 SINB
0b10 PCSC[2]
0b11 SINB
Address: Base + 0x0110 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as SOUTB or PCSC[5], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1