NXP Semiconductors MPC5566, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5566 Microcontroller Reference Manual, Rev. 2
20-8 Freescale Semiconductor
20.3.2 Register Descriptions
20.3.2.1 DSPI Module Configuration Register (DSPI x _MCR)
The DSPI x _MCR contains bits that configure the DSPI operation. The values of the HALT and MDIS bits
can be changed at any time, but the effect begins on the next frame boundary. The HALT and MDIS bits
in the DSPI
x _MCR are the only bit values software can change while the DSPI is running.
Base + 0x0010 DSPI x _CTAR1 DSPI clock and transfer attributes register 1 32
Base + 0x0014 DSPI x _CTAR2 DSPI clock and transfer attributes register 2 32
Base + 0x0018 DSPI x _CTAR3 DSPI clock and transfer attributes register 3 32
Base + 0x001C DSPI x _CTAR4 DSPI clock and transfer attributes register 4 32
Base + 0x0020 DSPI x _CTAR5 DSPI clock and transfer attributes register 5 32
Base + 0x0024 DSPI x _CTAR6 DSPI clock and transfer attributes register 6 32
Base + 0x0028 DSPI x _CTAR7 DSPI clock and transfer attributes register 7 32
Base + 0x002C DSPI x _SR DSPI status register 32
Base + 0x0030 DSPI x _RSER DSPI DMA/interrupt request select and enable register 32
Base + 0x0034 DSPI x _PUSHR DSPI push TX FIFO register 32
Base + 0x0038 DSPI x _POPR DSPI pop RX FIFO register 32
Base + 0x003C DSPI x _TXFR0 DSPI transmit FIFO register 0 32
Base + 0x0040 DSPI x _TXFR1 DSPI transmit FIFO register 1 32
Base + 0x0044 DSPI x _TXFR2 DSPI transmit FIFO register 2 32
Base + 0x0048 DSPI x _TXFR3 DSPI transmit FIFO register 3 32
Base + 0x004C–0x0078 — Reserved —
Base + 0x007C DSPI x _RXFR0 DSPI receive FIFO register 0 32
Base + 0x0080 DSPI x _RXFR1 DSPI receive FIFO register 1 32
Base + 0x0084 DSPI x _RXFR2 DSPI receive FIFO register 2 32
Base + 0x0088 DSPI x _RXFR3 DSPI receive FIFO register 3 32
Base + 0x008C–0x00B8 — Reserved —
Base + 0x00BC DSPI x _DSICR DSPI DSI configuration register 32
Base + 0x00C0 DSPI x _SDR DSPI DSI serialization data register 32
Base + 0x00C4 DSPI x _ASDR DSPI DSI alternate serialization data register 32
Base + 0x00C8 DSPI x _COMPR DSPI DSI transmit comparison register 32
Base + 0x00CC DSPI x _DDR DSPI DSI deserialization data register 32
Table 20-2. DSPI Detailed Memory Map (continued)
Address Register Name Register Description Bits