NXP Semiconductors MPC5566, Reference Manual

Page: 604 / 1268

MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 14-1
Chapter 14
Internal Static RAM (SRAM)
14.1 Introduction
The SRAM provides KB of general-purpose system SRAM. The first 32-KB of SRAM is powered by a
separate power supply pin for standby operation.
Figure 14-1 shows the internal SRAM block diagram.
Figure 14-1. Internal SRAM Block Diagram
The SRAM controller has these features:
• Read/write accesses can map to SRAM from any master
• 32 KB with a separate power source for standby operation
• Byte, halfword, word, and doubleword addressable
• Single-bit correction and double-bit error detection
14.2 SRAM Operating Modes
Table 14-1 lists and describes the SRAM operating modes.
14.3 External Signal Description
The external signal for SRAM is the V
STBY
RAM power supply. If the standby feature of the SRAM is
not used, tie the V
STBY
pin to V
SS
.
Table 14-1. SRAM Operating Modes
Mode Description
Normal (functional) Allows reads and writes of SRAM.
Standby Preserves the 32 KB of standby memory when the 1.5 V power drops below the level of V
STBY
.
Updates to standby SRAM are inhibited during system reset or during standby mode.
SRAM
V
STBY
32 KB
Standby SRAM