NXP Semiconductors MPC5566, Reference Manual

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MPC5566 Register Map
MPC5566 Microcontroller Reference Manual, Rev. 2
A-62 Freescale Semiconductor
Message buffer 47 MB47 16-bit Base + 0x0370
Message buffer 48 MB48 16-bit Base + 0x0380
Message buffer 49 MB49 16-bit Base + 0x0390
Message buffer 50 MB50 16-bit Base + 0x03A0
Message buffer 51 MB51 16-bit Base + 0x03B0
Message buffer 52 MB52 16-bit Base + 0x03C0
Message buffer 53 MB53 16-bit Base + 0x03D0
Message buffer 54 MB54 16-bit Base + 0x03E0
Message buffer 55 MB55 16-bit Base + 0x03F0
Message buffer 56 MB56 16-bit Base + 0x0400
Message buffer 57 MB57 16-bit Base + 0x0410
Message buffer 58 MB58 16-bit Base + 0x0420
Message buffer 59 MB59 16-bit Base + 0x0430
Message buffer 60 MB60 16-bit Base + 0x0440
Message buffer 61 MB61 16-bit Base + 0x0450
Message buffer 62 MB62 16-bit Base + 0x0460
Message buffer 63 MB63 16-bit Base + 0x0470
Reserved — — Base + (0x0500–end)
1
The registers mapped in the ECSM module (0xFFF4_0014–0xFFF4_001F) can control and configure the software watchdog timer
in the standard Freescale ECSM block incorporated in the device. The e200z6 core also provides this functionality and is the
preferred method for watchdog implementation. To optimize code portability to other members of the MPC55XX family, use of the
watchdog registers in the ECSM is not recommended.
Table A-3. e200z6 Core SPR Numbers (Supervisor Mode)
Register Description SPR (decimal)
General Registers
XER Integer Exception Register 1
LR Link Register 8
CTR Count Register 9
GPR0–GPR31 General Purpose Registers N/A
Special Purpose Registers
SPRG0 Special Purpose Register 0 272
SPRG1 Special Purpose Register 1 273
Table A-2. MPC5566 Detailed Register Map (continued)
Register Description Register Name
Used
Size
Address