NXP Semiconductors MPC5566, Reference Manual

Page: 386 / 1268

Enhanced Direct Memory Access (eDMA)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 9-25
Table 9-18 defines the fields of the basic TCD structure.
Table 9-18. TCD n 32-bit Memory Structure
eDMA Bit Offset
Bit
Length
TCD n Field Name TCD n Abbreviation Word #
(32 x n) + 0 32 Source address SADDR Word 0
(32 x n) + 32 5 Source address modulo SMOD
Word 1
(32 x n) + 37 3 Source data transfer size SSIZE
(32 x n) + 40 5 Destination address modulo DMOD
(32 x n) + 45 3 Destination data transfer size DSIZE
(32 x n) + 48 16 Signed source address offset SOFF
(32 x n) + 64 32 Inner minor byte count NBYTES Word 2
(32 x n) + 96 32 Last source address adjustment SLAST Word 3
(32 x n) + 128 32 Destination address DADDR Word 4
(32 x n) + 160 1 Channel-to-channel linking on minor loop complete CITER.E_LINK
Word 5
(32 x n) + 161 6 Current major iteration count or
Link channel number CITER or
CITER.LINKCH
(32 x n) + 167 9 Current major iteration count CITER
(32 x n) + 176 16 Destination address offset (signed) DOFF
(32 x n) + 192 32 Last destination address adjustment /
scatter gather address DLAST_SGA Word 6
(32 x n) + 224 1 Channel-to-channel Linking on Minor Loop Complete BITER.E_LINK
Word 7
(32 x n) + 225 6 Starting major iteration count or
link channel number BITER or
BITER.LINKCH
(32 x n) + 231 9 Starting major iteration count BITER
(32 x n) + 240 2 Bandwidth control BWC
(32 x n) + 242 6 Link channel number MAJOR.LINKCH
(32 x n) + 248 1 Channel done DONE
(32 x n) + 249 1 Channel active ACTIVE
(32 x n) + 250 1 Channel-to-channel linking on major loop complete MAJOR.E_LINK
(32 x n) + 251 1 Enable scatter/gather processing E_SG
(32 x n) + 252 1 Disable request D_REQ
(32 x n) + 253 1 Channel interrupt enable when current major
iteration count is half complete INT_HALF
(32 x n) + 254 1 Channel interrupt enable when current major
iteration count complete INT_MAJ
(32 x n) + 255 1 Channel start START