NXP Semiconductors MPC5566, Reference Manual

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System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-27
Refer to Table 6-19 for bit field definitions. Table 6-23 lists the PA field for ADDR[12:26]_GPIO[8:22].
6.3.1.17 Pad Configuration Registers 23–25 (SIU_PCR23–SIU_PCR25)
The SIU_PCR23–SIU_PCR25 registers control the function, direction, and electrical attributes of
ADDR[27:29]_GPIO[23:25].
Figure 6-18. ADDR[27:29]_GPIO[23:25] Pad Configuration Registers (SIU_PCR23–SIU_PCR25)
Refer to Table 6-19 for bit field definitions. Table 6-24 lists the PA field for ADDR[27:29]_GPIO[23:25].
Table 6-23. PCR8–PCR22 PA Field Descriptions
PA Field Pin Function
0b0 GPIO[8:22]
0b1 ADDR[12:26]
Address: Base + (0x006E
–
0x0072) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as ADDR[27:29], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When configured as ADDR[27:29] or GPDO, set the IBE bit to 1 to show the value in the GPDI register. Clear the IBE to 0 to
reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as ADDR[27:29], clear the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as ADDR[27:29].
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
Table 6-24. PCR23–PCR25 PA Field Descriptions
PA Field Pin Function
0b0 GPIO[23:25]
0b1 ADDR[27:29]