NXP Semiconductors MPC5566, Reference Manual

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Interrupt Controller (INTC)
MPC5566 Microcontroller Reference Manual, Rev. 2
10-32 Freescale Semiconductor
Figure 10-14. Software Vector Mode Handshaking Timing Diagram
10.4.3.2 Hardware Vector Mode Handshaking
A timing diagram of the interrupt request and acknowledge handshaking in hardware vector mode, along
with the handshaking near the end of the interrupt exception handler, is shown in
Figure 10-15 . As in
software vector mode, the INTC examines the peripheral and software settable interrupt requests, and
when it finds an asserted one with a higher priority than PRI in INTC_CPR, it asserts the interrupt request
to the processor. The INTVEC field in the INTC_IACKR is updated with the preempting peripheral or
software settable interrupt request’s vector when the interrupt request to the processor is asserted. The
INTVEC field retains that value until the next time the interrupt request to the processor is asserted. In
addition, the value of the interrupt vector to the processor matches the value of the INTVEC field in the
INTC_IACKR. The rest of the handshaking is described in
Section 10.1.4.2, “Hardware Vector Mode .”
The handshaking near the end of the interrupt exception handler, that is the writing to the INTC_EOIR, is
the same as in software vector mode. Refer to
Section 10.4.3.1.2, “End-of-Interrupt Exception Handler .”
Clock
Interrupt Request
to Processor
Hardware Vector
Enable
Interrupt
Acknowledge
Interrupt Vector
Read
INTC_IACKR
Write
INTC_EOIR
INTVEC in
INTC_IACKR
PRI in
INTC_CPR
Peripheral Interrupt
Request 100
0
0
0
108
1 0