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Frequency Modulated Phase Locked Loop and System Clocks (FMPLL)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
11-15
14
LOLRE
Loss-of-lock reset enable. The LOLRE bit determines how the integration module (the SIU) handles a loss
of lock indication. When operating in crystal reference, external reference, or dual-controller mode, the
FMPLL must be locked before setting the LOLRE bit. Otherwise reset is immediately asserted. The LOLRE
bit has no effect in bypass mode.
0 Ignore loss of lock, reset not asserted.
1 Assert reset on loss of lock. Reset remains asserted, regardless of the source of reset, until after the
FMPLL has locked.
15
LOCRE
Loss-of-clock reset enable. The LOCRE bit determines how the integration module (the SIU) handles a loss
of clock condition when LOCEN = 1. LOCRE has no effect when LOCEN = 0. If the LOCF bit in the SYNSR
indicates a loss of clock condition, setting the LOCRE bit causes an immediate reset. In bypass mode
LOCRE has no effect.
0 Ignore loss of clock, reset not asserted.
1 Assert reset on loss of clock.
16
DISCLK
Disable CLKOUT. The DISCLK bit determines whether CLKOUT is active. When CLKOUT is disabled it is
driven low.
0 CLKOUT driven normally
1 CLKOUT driven low
17
LOLIRQ
Loss-of-lock interrupt request. The LOLIRQ bit enables an interrupt request for LOLF when it (LOLIRQ) is
asserted and when LOLF is asserted. If either LOLF or LOLIRQ is negated, the interrupt request is negated.
When operating in crystal reference, external reference, or dual-controller mode, the FMPLL must be locked
before setting the LOLIRQ bit. Otherwise an interrupt is immediately requested. The LOLIRQ bit has no effect
in bypass mode.
0 Ignore loss of lock, interrupt not requested
1 Request interrupt
18
LOCIRQ
Loss-of-clock interrupt request. The LOCIRQ bit determines how the integration module (the SIU) handles a
loss of clock condition when LOCEN = 1. LOCIRQ has no effect when LOCEN = 0. If the LOCF bit in the
SYNSR indicates a loss of clock condition, setting (or having previously set) the LOCIRQ bit causes an
interrupt request. In bypass mode LOCIRQ has no effect.
0 Ignore loss of clock, interrupt not requested
1 Request interrupt on loss of clock.
19
RATE
Modulation rate. Controls the rate of frequency modulation applied to the system frequency. The allowable
modulation rates are shown below. Changing the rate by writing to the RATE bit initiates the FM calibration
sequence.
Note:
To prevent unintentional interrupt requests, clear LOLIRQ before changing RATE.
Note:
F
mod
must be between 100–250 MHz. Refer to
Section 11.4.3.2, “Programming System Clock
Frequency with Frequency Modulation
.”
Table 11-4. FMPLL_SYNCR Field Descriptions (continued)
Field
Description
RATE
Modulation Rate (Hz)
0
F
mod
= F
ref_crystal
÷
[(1)
×
80]
F
mod
= F
ref_ext
÷
[
(1)
×
80]
1
F
mod
= F
ref_crystal
÷
[
(1)
×
40]
F
mod
= F
ref_ext
÷
[
(1)
×
40]
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...