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Enhanced Direct Memory Access (eDMA)
MPC5566 Microcontroller Reference Manual, Rev. 2
9-28
Freescale Semiconductor
96–127
0xC
[0:31]
SLAST
[0:31]
Last source address adjustment. Adjustment value added to the source address at the
completion of the outer major iteration count. This value can be applied to “restore” the
source address to the initial value, or adjust the address to reference the next data
structure.
128–159
0x10
[0:31]
DADDR
[0:31]
Destination address. Memory address pointing to the destination data.
160
0x14
[0]
CITER.E_LINK
Enable channel-to-channel linking on minor loop completion. As the channel completes
the inner minor loop, this flag enables the linking to another channel, defined by
CITER.LINKCH[0:5]. The link target channel initiates a channel service request via an
internal mechanism that sets the TCD.START bit of the specified channel. If channel
linking is disabled, the CITER value is extended to 15 bits in place of a link channel
number. If the major loop is exhausted, this link mechanism is suppressed in favor of the
MAJOR.E_LINK channel linking.
0 The channel-to-channel linking is disabled.
1 The channel-to-channel linking is enabled.
Note:
This bit must be equal to the BITER.E_LINK bit otherwise a configuration error is
reported.
161–166
0x14
[1:6]
CITER
[0:5]
or
CITER.LINKCH
[0:5]
Current “major” iteration count or link channel number.
If channel-to-channel linking is disabled (TCD.CITER.E_LINK = 0), then
• No channel-to-channel linking (or chaining) is performed after the inner minor loop is
exhausted. TCD bits [161:175] are used to form a 15-bit CITER field.
otherwise
• After the minor loop is exhausted, the eDMA engine initiates a channel service request
at the channel defined by CITER.LINKCH[0:5] by setting that channel’s TCD.START
bit.
167–175
0x14
[7:15]
CITER
[6:14]
Current “major” iteration count. This 9 or 15-bit count represents the current major loop
count for the channel. It is decremented each time the minor loop is completed and
updated in the transfer control descriptor memory. After the major iteration count is
exhausted, the channel performs a number of operations (for example, final source and
destination address calculations), optionally generating an interrupt to signal channel
completion before reloading the CITER field from the beginning iteration count (BITER)
field.
Note:
When the CITER field is initially loaded by software, it must be set to the same
value as that contained in the BITER field.
Note:
If the channel is configured to execute a single service request, the initial values
of BITER and CITER must be 0x0001.
176–191
0x14 [16:31]
DOFF
[0:15]
Destination address signed offset. Sign-extended offset applied to the current destination
address to form the next-state value as each destination write is completed.
Table 9-19. TCD
n
Field Descriptions (continued)
Bits
Word Offset
[n:n]
Field Name
Description
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...