NXP Semiconductors MPC5566, Reference Manual

Page: 77 / 1268

Introduction
MPC5566 Microcontroller Reference Manual, Rev. 2
1-20 Freescale Semiconductor
1.6 MPC5500 Family Memory Map
This section describes the MPC5500 family memory map. All addresses in the device, including those that
are reserved, are identified in the tables. The addresses represent the physical addresses assigned to each
module. Logical addresses are translated by the MMU into physical addresses.
Reserved register bits are allocated for future products and have a default value of zero. When writing to
a register, the reserved bits default values must be written as well. Most device features are activated by
writing a non-zero value to them.
Reserved memory is allocated for future products, therefore do not write to memory segments that are
designated as reserved.
Under software control of the MMU, the logical addresses allocated to modules can be changed on a
minimum of a 4 KB boundary. Peripheral modules may be redundantly mapped. You must use the MMU
to prevent corruption.
Table 1-2 shows a detailed list of the device memory map.
Table 1-2. MPC5566 Detailed Memory Map
Address Range
1
Allocated Size
1
(bytes)
Used Size
(bytes)
Use
0x0000_0000–0x002F_FFFF 3 MB 3 MB Flash memory array
0x0030_0000–0x00FF_FBFF
13 MB–1 KB
(total flash
shadow row)
N/A Reserved
0x00FF_FC00–0x00FF_FFFF 1 KB 1 KB Flash shadow row
0x0100_0000–0x1FFF_FFFF 496 MB 2 MB Emulation mapping of flash array
0x2000_0000–0x3FFF_FFFF 512 MB N/A
External memory
2
0x4000_0000–0x4000_7FFF 32 KB 32 KB Internal SRAM array, standby powered
0x4000_8000–0x4001_FFFF 96 KB 96 KB Internal SRAM array
0x4002_0000–0xBFFF_FFFF
2048 MB–128 KB
(total SRAM)
N/A Reserved
Bridge A Peripherals
0xC000_0000–0xC3EF_FFFF 63 MB N/A Reserved
0xC3F0_0000–0xC3F0_3FFF 16 KB — Bridge A registers
0xC3F0_4000–0xC3F7_FFFF 496 KB N/A Reserved
0xC3F8_0000–0xC3F8_3FFF 16 KB — FMPLL registers
0xC3F8_4000–0xC3F8_7FFF 16 KB 48 External bus interface (EBI) configuration registers
0xC3F8_8000–0xC3F8_BFFF 16 KB 28 Flash configuration registers
0xC3F8_C000–0xC3F8_FFFF 16 KB N/A Reserved
0xC3F9_0000–0xC3F9_3FFF 16 KB 2.5 KB System integration unit (SIU)
0xC3F9_4000–0xC3F9_FFFF 48 KB N/A Reserved