NXP Semiconductors MPC5566, Reference Manual

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Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 17-43
17.4.4.4.10 Windowed Programmable Time Accumulation Mode (WPTA)
The WPTA mode accumulates the sum of the total high time or low time of an input signal over a
programmable interval (time window).
The prescaler bits UCPRE[0:1] in EMIOS_CCR n define the increment rate of the internal counter.
Register A1 holds the start time and register B1 holds the stop time of the programmable time interval.
When a match occurs between register A and the selected timebase, the internal counter is cleared and it
is ready to start counting. The internal counter is used as a time accumulator; that is, it counts up when the
input signal has the same polarity of EDPOL bit in EMIOS_CCR
n and does not count otherwise. When a
match occurs in comparator B, the internal counter is disabled regardless of the input signal polarity and
the FLAG bit is set. At the same time the content of EMIOS_CCNTR
n is transferred to register A2.
Reading EMIOS_CCNTR n or A2 returns the high or low time of the input signal.
EMIOS_CCNTR n is stable only outside the time window defined from A1 to B1 matches, otherwise its
contents reflects a count in progress and not the final value. Alternatively to EMIOS_CCNTR n , register
A2 returns the latest available measurement. Because this register is updated only at comparator B
matches, it always contains stable and up-to-date data. In WPTA mode this register is accessible through
the alternate register address EMIOS_ALTA
n .
NOTE
The FORCMA and FORCMB bits have no effect when the unified channel
is configured for WPTA mode.