NXP Semiconductors MPC5566, Reference Manual

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System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-66 Freescale Semiconductor
Refer to Table 6-19 for bit field definitions. Table 6-81 lists the PA fields for
ETPUA[5]_ETPUA[17]_GPIO[119].
6.3.1.82 Pad Configuration Register 120 (SIU_PCR120)
The SIU_PCR120 register controls the function, direction, and electrical attributes of
ETPUA[6]_ETPUA[18]_GPIO[120]. Only the output channels of ETPUA[18] are connected. Both the
input and output channels of ETPUA[6] are connected.
Figure 6-83. ETPUA[6]_ETPUA[18]_GPIO[120] Pad Configuration Register (SIU_PCR120)
Refer to Table 6-19 for bit field definitions. Table 6-82 lists the PA fields for
ETPUA[6]_ETPUA[18]_GPIO[120].
Table 6-81. PCR119 PA Field Definitions
PA Field Pin Function
0b00 GPIO[119]
0b01 ETPUA[5]
0b10 ETPUA[17]
0b11 ETPUA[5]
Address: Base + 0x0130 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to one for ETPUA[6] and GPIO[120] when configured as outputs. When configured as ETPUA[18],
the OBE bit has no effect.
IBE
2
2
The IBE bit must be set to 1 for ETPUA[6], ETPUA[18], and GPIO[120] when configured as inputs.
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for theETPUA[6], ETPUA[18], signals is determined by WKPCFG.
Table 6-82. PCR120 PA Field Definitions
PA Field Pin Function
0b00 GPIO[120]
0b01 ETPUA[6]
0b10 ETPUA[18]
0b11 ETPUA[6]