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External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
12-10
Freescale Semiconductor
Section 12.4.1.13, “Four Write/Byte Enable (WE/BE) Signals — 416 BGA Package and VertiCal
” for more details on the WE/BE functionality.
12.2.1.12 Bus Busy (BB)
BB is asserted to indicate that the current bus master is using the bus. The BB signal is only used by the
EBI when the EBI is in external master mode. In single master mode, the BB signal is never asserted or
sampled by the EBI.
When configured for internal arbitration, the EBI asserts BB to indicate that it is currently using the bus.
An external master must not begin a transfer until this signal is negated for two cycles. The EBI does not
negate this signal until its transfer is complete. When not driving BB, the EBI samples this signal to get an
indication of when the external master is no longer using the bus (BB negated for two cycles).
When configured for external arbitration, the EBI asserts this signal when it is ready to start the transaction
after the external arbiter has granted ownership of the bus to the MCU. When not driving BB, the EBI
samples this signal to properly qualify the BG line when an external bus transaction is to be executed by
the MCU.
12.2.1.13 Bus Grant (BG)
BG is asserted to grant ownership of the external bus to the requesting master. The BG signal is only used
by the EBI when the EBI is in external master mode. In single master mode, the BG signal is never asserted
or sampled by the EBI.
When configured for internal arbitration, BG is an output only signal. The EBI asserts BG to when an
external master can take control of the bus. The master requesting the bus must qualify the BG signal to
ensure it controls the bus before beginning a bus transaction. A qualified bus grant includes the bus busy
time (BG = ~BB and BG). The EBI negates BG following the negation of BR if it has an internal request
for the external bus pending. Otherwise, BG remains asserted to park the bus for the external master. The
parked external master can then assert BB to run subsequent transactions without the normal requirement
to assert BR.
When configured for external arbitration, BG is an input only signal. The EBI must sample and qualify
(BG = ~BB and BG) the bus grant when an external bus transaction is ready for execution by the MCU.
12.2.1.14 Bus Request (BR)
BR is asserted to request ownership of the external bus. The BR signal is only used by the EBI when the
EBI is in external master mode. In single master mode, the BR signal is never asserted or sampled by the
EBI.
When configured for internal arbitration, BR is input only and is asserted by an external master when it is
requesting the bus.
When configured for external arbitration, BR is output only and is asserted by the EBI when it is requesting
the bus. The EBI negates BR as soon as it is granted the bus and the bus is not busy, provided it has no
other internal requests pending. If more requests are pending, the EBI keeps BR asserted as long as needed.
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...