NXP Semiconductors MPC5566, Reference Manual

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External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 12-15
The following table describes the fields in the EBI module configuration register:
Table 12-7. EBI_MCR Field Descriptions
Field Description
0–4 Reserved.
5
SIZEN
SIZE enable. The SIZEN bit enables the control of transfer size by the SIZE field (as opposed to external TSIZ pins)
for external master transactions to internal addresses.
0 Transfer size controlled by TSIZ[0:1] pins
1 Transfer size controlled by SIZE field
6–7
SIZE
Transfer size. The SIZE field determines the transfer size of external master transactions to internal address space
when SIZEN = 1. This field is ignored when SIZEN = 0. SIZE encoding:
00 32-bit
01 Byte
10 16-bit
11 Invalid value
8–15 Reserved.
16
ACGE
Automatic CLKOUT gating enable. Enables the EBI feature of turning off CLKOUT (holding it high) during idle periods
in-between external bus accesses.
0 Automatic CLKOUT gating is disabled
1 Automatic CLKOUT gating is enabled
17
EXTM
External master mode. The EBI module must be enabled (MDIS = 0) to configure the external master mode. When
the EBI module is disabled (MDIS = 1), the value of the EXTM bit is ignored and read as 0.
External master mode (EXTM = 1) allows the external master device to access any internal memory area that is
mapped, as long as the internal e200z6 core is fully operational.
Single master mode (EXTM = 0) only allows internal masters can access internal memory.
This bit also determines the functionality of the BR, BG, and BB signals.
Note: The SIU PCR registers must configure BR, BG, and BB for EBI function (as opposed to default GPIO) prior to
EXTM being set to 1, or operations can result.
0 Single master mode (external master mode disabled)
1 External master mode
18
EARB
External arbitration. See Section 12.4.2.8, “Arbitration ” for details on internal and external arbitration.
When EXTM = 0, the EARB bit is not used, and is treated as 0.
0 Internal arbitration
1 External arbitration
19–20
EARP
[0:1]
External arbitration request priority. Defines the priority of an external master’s arbitration request (0–2), with 2 as
the highest priority level (EARP = 3 is reserved). This field is valid only when EARB = 0 (internal arbitration). The
internal masters of the MCU have a fixed priority of 1. By default, internal and external masters have equal
priority.
See Section 12.4.2.8.2, “Internal Bus Arbiter ,” for the internal and external priority detailed description.
00 MCU has priority
01 Equal priority, round robin used
10 External master has priority
11 Invalid value
21–24 Reserved.