Flash Memory
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
13-3
13.1.3
Features
The following list summarizes the key features of the FBIU:
•
The FBIU system bus interface supports a 64-bit data bus. Byte, halfword, word, and doubleword
reads are supported. Only aligned word and doubleword writes are supported.
•
The FBIU provides configurable read buffering and line prefetch support. Two line read buffers
(each 256 bits wide) and a prefetch controller are used to support single-cycle read responses for
hits in the buffers.
•
The FBIU provides hardware and software configurable read and write access protections on a
per-master basis.
•
The FBIU interface to the flash array controller is pipelined with a depth of 1.
•
The FBIU allows configurable access timing.
•
The FBIU provides multiple-mapping support and mapping-based block access timing
(0–31 additional cycles) allowing use for emulation of other memory types.
The flash memory array has the following features:
•
Software programmable block program/erase restriction control for low, mid, and high address
spaces.
•
Erase of selected blocks.
•
ECC with single-bit correction, double-bit detection.
•
Page program size of 256 bits allows programming from one to four consecutive 64-bit
doublewords within a page.
•
Embedded hardware program and erase algorithm.
•
Read while write with multiple partitions.
•
Stop mode for low power stand-by.
•
Erase suspend, program suspend, and erase-suspended program.
•
Automotive flash that meets automotive endurance and reliability requirements.
•
Shadow information is stored in a non-volatile shadow block.
•
Independent program/erase of the shadow block.
13.1.4
Modes of Operation
13.1.4.1
User Mode
User mode is the default operating mode of the flash memory block. In this mode, you can read, write,
program, and erase the flash. Refer to
Section 13.4.2, “Flash Memory Array: User Mode
13.1.4.2
Stop Mode
In stop mode (FLASH_MCR[STOP] = 1), all DC current sources in the flash are disabled. Refer to
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...
