NXP Semiconductors MPC5566, Reference Manual

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Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 18-29
6
AM
Angle mode selection. When the AM bit is set and neither TCR1 nor TCR2 are STAC interface clients, the
EAC (eTPU Angle Clock) hardware provides angle information to the channels using the TCR2 bus. When
the AM bit is cleared (non-angle mode), EAC operation is disabled, and its internal registers can be used as
general purpose registers.
0 EAC operation is disabled.
1 TCR2 works in angle mode;
• if TCR2 is not a STAC client, the EAC works and stores tooth counter and angle tick counter data in TCR2.
• If TCR1 or TCR2 is a STAC bus client, EAC operation is forbidden. Therefore, if AM is set, the angle logic
does not work properly.
Note: AM must not be changed when ETPU_MCR[GTBE] = 1.
Note: Changing AM can cause expurious transition detections on channel 0, depending on the channel
mode and state.
For more information, refer to the eTPU Reference Manual .
7–9 Reserved
10–15
TCR2P
Timer count register 2 prescaler control. Part of the TCR2 clocking system. TCR2 is clocked from the output
of a prescaler. The prescaler divides its input by (TCR2P+1) allowing frequency divisions from 1 to 64. The
prescaler input is the system clock divided by 8 (in gated or non-gated clock mode) or Internal Timebase
input, or TCRCLK filtered input. This field has no effect on TCCR2 in Angle Mode. For more information on
TCR2, refer to the
eTPU Reference Manual .
16–17
TCR1CTL
TCR1 clock/gate control. Part of the TCR1 clocking system. It determines the clock source for TCR1. TCR1
can count on detected rising edge of the TCRCLK signal or the system clock divided by 2. After reset
TCRCLK signal is selected. The following table shows the selection of the TCR1 clock source.
For more information on the TCR1 clocking system, refer to the eTPU Reference Manual .
18–23 Reserved.
24–31
TCR1P
Timer count register 1 prescaler control. Clocked from the output of a prescaler. The input to the prescaler is
the internal eTPU system clock divided by 2 or the output of TCRCLK filter, or Peripheral Timebase input.
The prescaler divides this input by (TCR1P+1) allowing frequency divisions from 1 up to 256.
Table 18-11. ETPU_TBCR Field Descriptions (continued)
Field Description
TCR1CTL TCR1 Clock
00
selects TCRCLK as clock source for the TCR1 prescaler (must not be use
in Angle Mode)
01 Reserved
10 selects system clock divided by 2 as clock source for the TCR1 prescaler
11 TCR1CTL shuts down TCR1 clock. TCR1 can still change if STAC client.