NXP Semiconductors MPC5566, Reference Manual

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Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
18-12 Freescale Semiconductor
• TCRCLK clock input
Therefore, a dual-engine system has a total of 130 external signals. There are four internal output disable
signals for each eTPU engine that implement the output disable feature needed for motor control.
Refer to 17.2.1.1, “Output Disable Input—eMIOS Output Disable Input Signals ,” for more information.
18.3.2 Output and Input Channel Signals
Each eTPU channel has an input and output associated with it, and these can be connected to external pins
or wired internally to other peripheral devices. As shown in
Chapter 20, “Deserial Serial Peripheral
Interface (DSPI) ” and Table 20-20 , eTPU output channel 0 (ETPUA[0]_ETPUA[12]_GPIO[114]) is
serialized to DSPI C and then connected to input 2 on the IMUX for external IRQ[3]. Most eTPU channels
are serialized, but eTPU channels 22 and 23 are connected to their pin only.
Some channels are serialized through one DSPI to two different locations. The eTPU channel 29
(ETPUA[29]_PCSC[2]_GPIO[143]) is serialized to both eTPU_A input channel 29 and input 1 on IMUX
for external IRQ[8]. This serialization is performed by DSPI B. Finally, some channels are serialized
through different DSPIs. The eTPU channel 17 is serialized through DSPI B to input 1 on IMUX for
external IRQ[6], but is also serialized by DSPI D to input 3 on IMUX for external IRQ[2].
Figure 20-22 , Figure 20-23 , and Figure 20-24 along with Table 20-20 , Table 20-21 , and Table 20-22
explain the serial connectivities of the eTPU and eMIOS channels.
The following table lists the eTPU B channel connections:
Table 18-1. eTPU B Channel Connection Table
eTPU
Channel
Number
I/O Pin Number
eTPU Channel
Connections
DSPI Serial
Channel
Connections
eTPU B
Signal
Signals with
Which eTPU
Signal is Shared:
0–7
I M25, M24, L26, L25,
L24, K26, L23, K25
0–7
not connected
eTPU_B[0:7]
eTPU_B[16:23]
(output only)
GPIO[147:154]
DSPI A[15:8]
1
1
The channel numbers for some of the DSPI channels connections are reversed, for example if eTPU_B[0:7] is mapped
to DSPI_A[15:8], then eTPU_B[0] is connected to DSPI_A[15], eTPU_B[1] is connected to DSPI_A[14],..., eTPU_B[7] is
connected to DSPI_A[8].
O
AE19, AD19, AF20,
AE20, AF21, AC19,
AD20, AF21
0–7
eMIOS[16:23]
GPIO[195:202]
8–15
I
K24, J26, K23, J25,
J24, H26, H25, G26
8–15
not connected
eTPU_B[8:15]
eTPU_B[24:31]
(output only)
GPIO[155:162]
O DSPI A[7:0]
1
16–31
I D16, D17, A17, C16,
A18, B17, C17, D18,
A19, B18, C18, A20,
B19, D19, C19, B20
16–31 not connected eTPU_B[16:31] GPIO[163:178]
O