Foundry NetIron M2404C and M2404F Metro Access Switches
Configuring HQoS (Rev.03)
QoS/HQoS Implementation
© 2008 Foundry Networks, Inc.
Page 12 of 98
NOTE
For ACL and legacy QoS configuration, please refer to the “Configuring ACL”
and “Configuring QoS” chapters; respectively.
•
The 2x1Gb/s Packet Processor ports
serve internal connection links. An
intelligent load-
balancing
mechanism makes sure that both links are fully utilized. The load-balancing is per
service.
•
The Service HQoS
provides full service/SAP/customer-site level HQoS implementation to
enable true multi-level SLA assurance and is the most important advantage of the NetIron
M2404x over competing devices without full HQoS support. As a part of the Add path the
Service HQoS works in the “Service Ingress” direction. For full details regarding the Service
HQoS implementation, see further sections of this document.
•
The VPLS/VPWS
functional block enables the enhanced Metro Ethernet Services: VPLS and
VPWS. It is responsible for encapsulating the user traffic in VPLS headers so that it can be
sent to the MPLS network. It is also responsible for switching traffic that passes from network
to network (pass-through traffic).
•
The Network HQoS
provides additional traffic marking/queuing/scheduling/ shaping before it
is sent to the Enhanced Uplink Ports in order to enable network congestion control and adapt
the outgoing traffic to the service provider’s network’s QoS model.
The platform Drop path implementation provides most of the functionality of the Add path, in the
opposite direction:
•
The VPLS/VPWS
functional block decapsulates VPLS/VPWS traffic so it can be recognized
and processed by the Packet Processor.
•
The Service HQoS
works in the Service Egress direction and provides a fully mirrored
functionality to the Service Ingress direction HQoS.
•
The Internal Connection
links to the Packet Processor are fully utilized using a service-based
intelligent load-balancing mechanism.
•
User Traffic Aggregation & Bridging
as part of the Drop path
is responsible for distributing
the packets to the appropriate users/SAPs. It also performs replication of multicast packets,
offloading this functionality from the ES Processor and saving bandwidth on the Internal
Connection links.
Internal Architecture
The QoS/HQoS mechanisms, implemented in both the Packet Processor and the ES Processor, are
shown in general in
Figure 8
.